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Example Designs, Tutorials, Application Notes
Here are some example designs that we created. Designs developed by our customers are listed further below. And go to the bottom of the page to find a list of useful tutorials and application notes.
| Design Examples From XESS | Doc | Design Files |
Contact |
 Video is a simple design example for the XST-3.0 Board
that digitizes a frame of video and displays it on a VGA monitor. |
HTML | ZIP |  |
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IDE
is a simple design example that writes data to sectors on an
IDE hard disk and then reads it back to verify it. |
HTML | ZIP | |
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Audio is a simple design example for the XST-3.0 Board
that digitizes a stereo input signal and then converts it back
into an analog output signal (i.e., simple audio loopback). |
HTML | ZIP | |
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RS232
is a simple design example that echoes characters received
through the RS232 port of the XST-3.0 Board back to the sending
terminal. |
HTML | ZIP | |
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Switches
and LEDs is a simple design example for the XST-3.0 Board
that lets you enter two four-bit numbers on the LED switch and
displays the sum or difference on the seven-segment LED digits. |
HTML | ZIP | |
| VGA generator with parallel port SDRAM interface that allows downloading an image via the parallel port while the VGA generator is running. | HTML | ZIP | |
| GNAT module for the XSA-3S1000 Board lets you monitor and control your FPGA design through the JTAG port. | HTML | ZIP | |
| Dualport module that attaches to the front-end of the SDRAM controller to provide two or more independent read/write channels to the SDRAM. | HTML, PDF | ZIP | |
| Pipelined SDRAM controller module for the XSB Board that makes the SDRAM look like a simple static RAM. | ZIP | |
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| Pipelined SDRAM controller module for the XSA Board that makes the SDRAM look like a simple static RAM. | HTML, PDF | ZIP | |
| Use makefiles to automate the batch processing of WebPACK / ISE designs. | HTML | ZIP | |
| VGA generator that displays an image from the XSA Board SDRAM on a VGA monitor. | ZIP | |
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| PS/2 keyboard interface for the XSA Board that lets it accept keystrokes from an attached keyboard. | ZIP | |
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| XSB Compact Flash / IDE hard disk interface that lets you read and write data on these non-volatile storage media. | ZIP | |
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| Stereo codec interface for the XSA and XSB Boards. | ZIP | |
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| XSB audio codec configurator that lets you configure the settings of the AK4565 codec chip. | ZIP | |
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| XSB frame grabber that grabs frames of video and displays them on a VGA monitor. (Preliminary release - no documentation.) | ZIP | |
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| XSB parallel port interface that is programmed into the CPLD. | ZIP | |
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| XSB PIII Cable interface that configures the CPLD so it emulates a Xilinx Parallel Cable III interface. This allows you to use the WebPACK programming tools through the simple XESS downloading cable. | ZIP | |
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| XSA PIII Cable interface that configures the CPLD so it emulates a Xilinx Parallel Cable III interface. This allows you to use the WebPACK programming tools through the simple XESS downloading cable. | ZIP | |
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| XSA Flash designs that manage the programming of the Flash and the configuration of the SpartanII FPGA upon power-up. | ZIP | |
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| XSA parallel port interface that is programmed into the CPLD. | ZIP | |
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| XSV PIII Cable interface that configures the CPLD so it emulates a Xilinx Parallel Cable III interface. This allows you to use the Foundation programming tools through the simple XESS downloading cable. | ZIP | |
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| Xchecker interface that configures the CPLD on the XSV Board so the Xchecker interface is enabled. | ZIP | |
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| XSV parallel port interface that is programmed into the CPLD. | ZIP | |
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| XSV Flash designs that manage the programming of the Flash and the configuration of the Virtex FPGA upon power-up. | ZIP | |
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| Loadable LED register showing the interaction between the microcontroller and the CPLD or FPGA on the XS Board. | HTML |
ZIP | |
| Read/write random number generator showing the interaction between the microcontroller and the CPLD or FPGA on the XS Board. | HTML |
ZIP | |
| XStend Board design examples showing use of buttons/switches, keyboard interface, and VGA port. | ZIP | |
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| VGA Generator that displays an image in the XS Board RAM on a VGA monitor. | ZIP | |
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| Stereo loopback circuit that accepts a digitized stereo signal from the ADC of the XStend Board codec and loops the signal back to the codec DAC stage for output as a stereo signal. | ZIP | |
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| Design Examples From Our Customers | Doc | Design Files |
Contact |
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University Image Processing Environment
describes a framework used by students at ENSTA to develop algorithms and implement
them on an XST-3S1000 hardware platform.
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| HD44780 LCD interface shows how to control this alphanumeric display using a combination of delay elements and an FSM programmed into an XSA-200 Board. | ZIP |
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| Rijndael S-Box implementation for the XSA-200 Board shows how to build a small, fast, combinatorial circuit for the SubByte transformation step in the Advanced Encryption Standard (AES). | ZIP |
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| Snake video game demo for the XSA-3S1000 + XST-3 Boards shows the dual-layer and alpha blending capabilities of an enhanced VGA generator coupled with a dual-port SDRAM controller, PS/2 keyboard controller and a Picoblaze microcontroller. | ZIP |
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| XSB frame grabber from the University of Engineering & Technology Taxila, grabs frames of video and displays them on a VGA monitor. (This version is written in Verilog.) | ZIP |
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| Mic8-Bit RISC Microprocessor: This tutorial from AIR University describes the design of a RISC processor from concept through implementation, simulation and testing on an XSA-50 Board. |
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| NTSC Video Generator: This circuit outputs an 8-bit grayscale image in NTSC format. | ZIP |
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| OpenRISC OR1200 SOC: This system-on-a-chip incorporates an OR1200 RISC CPU, UART, SDRAM controller, PS/2 controller, dumb terminal and jtag debug interface. | ZIP |
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| MicroBlaze SOC: This system-on-a-chip incorporates a Xilinx MicroBlaze CPU, SDRAM controller, and VGA character generator. | ZIP |
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| Nexar / Protel 2004 Interface for the XSA-100 Board: Nexar is a design environment that provides soft processor cores complete with integrated build and debugging tools and virtual instruments that communicate through the JTAG interface. This interface is an enhancement of the XSA PIII Cable interface that adds the Nexar Soft JTAG chain functionality while still remaining backwards compatible with the Xilinx Impact software. | ZIP |
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| XSA-50 terminal program: This is an implementation of a terminal with a VGA monitor, PS/2 keyboard and an RS232 serial port | ZIP |
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| FPGA-based oscilloscope: This project descibes a stand-alone digital oscilloscope that interfaces directly to a VGA monitor. | ZIP |
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| xsocXR16:This project uses the XR16 CPU that Jan Gray originally designed for the XESS XS40-005XL FPGA Board with SRAM. This project extracts the CPU fully intact and interfaces it to the SDRAM contained on the XSA-100 board. | ZIP |
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| xsocVGABitmap: Using Jan Gray's XSOC vga video circuit and XESS's SDRAM controller, a design was assembled to demonstrate how to use SDRAM as a source of pixel information for the vga controller. This design demonstrates the basic mechanics of how to interface to SDRAM memory. Also demonstrates how to mix Verilog and VHDL code in the same design. | ZIP |
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| xsocVGAStripes: Using Jan Gray's XSOC vga video circuit, a simple design was assembled to demonstrate how to use it with an XSA-100 board. Good example on how to mix Verilog (the vga circuit) and VHDL code together in a single design. | ZIP |
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| Micro8-XSA is John Kent's Micro8 CPU running on an XSA board with XStend. Very neat project that runs a small custom VHDL CPU interfaced to SRAM on the XStend board and RS232 port. Demonstrates how to properly address decode and memory map an I/O device. All components are now Wishbone compliant! | ZIP |
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| RS232 demonstrates how to interface through the RS232 port on the XESS XStend-2 board. The project echoes characters received from a terminal. | ZIP |
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| vgaBall generates a VGA signal and creates a "ball" that bounces. | ZIP |
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| vgaChars generates a VGA signal and displays characters from an onboard character ROM. | ZIP |
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| vgaStrips generates a VGA signal and draws a series of colored bars.. | ZIP |
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| PS/2 keyboard controller project. | ZIP |
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| Stepper Motor Controller project uses the CPLD and 8031 microcontroller on the XS95 Board to control the rotational speed and direction of a stepper motor. (This project is in Spanish.) | ZIP |
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| A Collection of Student Projects such as realtime, compressed video conferencing, the game of life, video animation, tennis video game, fuzzy logic controller and various communications systems using the XS40. (Escuela Superior de Ingenieros. University of Sevilla) | HTML |
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| Reconfigurable Coprocessor for Redundant Radix-4 Arithmetic project implements four arithmetic and four logic operations using a fast parallel multiplication scheme. The coprocessor is hosted in an XS40 Board that interfaces to a PC hrough the parallel port. | ZIP |
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| Handel-C examples for the XS40 Board. |
HTML1 HTML2 |
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| Digital Camera Interface project shows how a CMOS ‘Camera On a Chip’ image sensor can be interfaced to an XSA-100 Board through an I2C bus. The pixel data is buffered in the XSA-100 SDRAM and is then uploaded through the parallel port to be displayed on a PC. | ZIP |
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| Audio FIR filter on an XSV-800 Board demonstrates three different types of filters: low pass, band pass and high pass. |
PDF HTML |
ZIP |
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| Audio volume indicator uses an XS40 Board and XStend Board to display the volume of an audio input on a bargraph LED. | ZIP | ||
| Calculator uses the 8051 microcontroller and FPGA on the XS40 Board to build a simple calculator. | ZIP |
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| Wavelet image compression for the XSV-300 Board done by Daniel Bachofen at FHS, University of Applied Science St.Gallen. |
PDF (German) TXT (English) |
ZIP |
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| Secure comunication system I transfers data between two XS40 boards with encryption by means of a smplyfied DES algorithm. (Escuela Superior de Ingenieros. University of Sevilla) | HTML |
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| Secure communication system II transfers encrypted data between two XS40 boards. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| PS/2 mouse driver that shows mouse movements on a screen using the XS40. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| Cordic algorithm for the XS40 Board. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| Break Out videogame running on XS40 hardware. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| Codec Morse for two XS40 boards. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| Spinning image effect in 3D turns an image around a vertical axis using an XS40. (Escuela Superior de Ingenieros. University of Sevilla) | ZIP |
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| A 10/100 Mbps Ethernet MAC implemented in a Virtex XCV300 FPGA with the XSV board. (Bandung Institute of Technology) | HTML/PDF | Files |
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 USB
macro that combines a complete USB transaction layer with an
8051 microcontroller core and a functional block that implements
the application-specific functions. This macro was developed
and is supported by Trenz Electronics for use with an XSV Board. |
ZIP |
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| Introduction to XSV Board designs done by the University of Queensland | HTML/PDF |
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| CPLD interface files for the XSV Board projects (Univ. of Queensland) | HTML/PDF | ZIP |
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| Audio project for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| PC to SRAM interface for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| PS/2 interface for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| SRAM interface for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| Video-In for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| VGA-out for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| VHDL IP stack for the XSV Board (Univ. of Queensland) | HTML/PDF | ZIP |
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| Jbits XHWIF interface for the XSV-100 Board. | TXT | ZIP | |
| Jbits XHWIF interface for the XS40-005XL Board. | TXT | ZIP | |
| JBits XHWIF interface for the XSV Boards (developed by Xilinx) | HTML | ZIP | |
| PC/XS Transfer: A circuit and C code for bidirectional transfer of data between an XS40 Board and a PC. | ZIP |
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| 16-bit RISC processor with five pipeline stages. The instruction set implements ALU, immediate, load, store, and branch instructions. | TAR |
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| Walking-bit circuit shifts a 1 through a register mapped to the 7-segment LED. This design shows the interactions between the XC4000 FPGA and the 8031 microcontroller on the XS40 Board. | ZIP |
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| Tutorials | Doc | ||
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Xilinx ISE 10 Tutorial
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HTML | ||
| Introduction to WebPACK 8.1 (XSA Board version) | HTML | ||
| Introduction to WebPACK 6.3 (XSA Board version) | HTML | ||
| Introduction to WebPACK 6.1 (XSA Board version) | |||
| Introduction to WebPACK 6.1 (XSB-300E Board version) | HTML | ||
| Introduction to WebPACK 5.2 for FPGAs (XSB-300E Board version) | |||
| Introduction to WebPACK 4.1 for FPGAs (XSA Board version) | |||
| Introduction to WebPACK 4.1 for CPLDs (XS95 Board version) | |||
| Introduction to WebPACK 3.1 | |||
| Introduction to WebPACK 1.5 | |||
| "Quickstart Guide to Creating and Testing Designs for the XESS Boards" by Mel Tsai at Michigan State University | HTML | ||
| How to Use the XS Boards | HTML | ||
| Pragmatic Logic Design with Foundation 2.1i (Introduction and Chapter 1) | |||
| Pragmatic Logic Design with Foundation 2.1i (Chapter 2) | |||
| Pragmatic Logic Design with Foundation 2.1i (Chapter 3) | |||
| Pragmatic Logic Design with Foundation 2.1i (Chapter 4) | |||
| Pragmatic Logic Design with Foundation 2.1i (Chapter 5) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 1-1) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 1-2) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 1-3) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 1-4) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 2-1) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 2-2) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 2-3) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 2-4) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 3-1) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 3-2) | |||
| myCSoC: Design Explorations With Your Configurable System on a Chip (Chapter 4-1) | |||
| Application Notes | Doc | ||
| Using GNAT on the XSA-3S1000 Board | HTML | ||
| XSB Board SDRAM Controller | |||
| XSA Board SDRAM Controller | |||
| Makefiles for Xilinx FPGA / CPLD Projects | HTML | ||
| VGA Generator for the XSA Boards | |||
| PS/2 Keyboard Interface for the XSA Boards | |||
| Stereo Codec Interface | |||
| Configuring the Audio Codec on the XSB-300E Board | |||
| XSB Parallel Port Interface | |||
| Parallel Cable III Emulator for the XSB Board | |||
| Parallel Cable III Emulator for the XSA Board | |||
| XSA Flash Programming and SpartanII Configuration | |||
| XSA Parallel Port Interface | |||
| Parallel Cable III Emulator for the XSV Board | |||
| Using the XSV Board Xchecker Interface | |||
| XSV Parallel Port Interface | |||
| XSV Flash Programming and Virtex Configuration | |||
| Running Foundation from a Makefile | |||